The present disclosure relates to performance monitoring, and more specifically, to methods and systems and computer program products for performance monitoring using a redundancy tracking register.
As electronic systems become more complicated, there is a greater need for monitoring the performance of the systems to ensure optimum operation and identify any defects or design problems. This concern is particularly important for integrated circuits such as processors and other state-of-the-art devices used in computer systems. A typical processor includes various execution units, registers, buffers, memories, and other functional units which are all formed by integrated circuitry. Hardware counters may be embedded within this circuitry to keep track of various events. Today's processors typically provide performance monitoring counters that count the time, cycles, or other types of events between a first event and a second event. As performance monitoring counters grow in number, it is important to focus on memory reads of relevant hardware counters each read cycle. 24×7 In-Memory-Accumulation (hereinafter, 24×7 IMA) is a methodology implemented in Power8 to utilize an embedded POWERPC core in the P8 chip to periodically read a performance monitoring unit (PMU) counter value in hardware and accumulate these counter values in a specific location in the system memory from where they can be readily accessed via a software tool. As multiple events occur or do not occur within the periodic read of a PMU counter value, it would be beneficial to read only those counter values that have changed between periodic reads.